+----------------------------------------------------------------------+
    |                         BIOS Release History                         |
    +----------------------------------------------------------------------+
    |  Project Name                 : EP2C622D24LM                         |
    |  CPU                          : Skylake-SP                           |
    |  Chipset                      : CASCADELAKE                          |
    |  BMC                          : AST2500                              |
    |  Flash Part                   : Winbond W25Q256JVFQ                  |
    |                               : MXIC MX25L25635FMI-10G               |
    +----------------------------------------------------------------------+
    |  [VGA]                                                               |
    |  ASPEED VGA (Legacy)          : 1.08.00                              |
    |             (UEFI)            : 1.08.00                              |
    |  [Storage]                                                           |
    |  Intel RAID                   : 6.0.0.1024                           |
    |  [LAN]                                                               |
    |  Intel X722 (PXE)             : by EEPROM                            |
    |             (UEFI)            : by EEPROM                            |
    |  [Others]                                                            |
    |  DCPMM Drirvers               : 01.00.00.3402                        |
    +----------------------------------------------------------------------+
    |  RC Version                   : 0571.D03                             |
    |  SPS FW Version               : 04.01.04.251                         |
    +----------------------------------------------------------------------+
    |  CPU Microcode                                                       |
    |  SKX-H0                       : 50654_02000057                       |
    |  CLX-A0                       : 50655_03000010                       |
    |  CLX-B0                       : 50656_04000017                       |
    |  CLX-B1                       : 50657_05000017                       |
    +----------------------------------------------------------------------+
    |  Update Tool                  : wIFUPack                             |
    |                               : AfuEfix64 v5.11.00.1727              |
    |                               : AFUWINx64 v5.11.00.1727              |
    |                               : afulnx_64 v5.11.00.1727              |
    |  Support Tool                 : SceEfi v5.03.1111                    |
    |                               : SceLnx v5.03.1111                    |
    |                               : SceWin v5.03.1111                    |
    +----------------------------------------------------------------------+
    |  Aptio 5.014                                                         |
    |  VeB Version                  : Aptio 7.19.0628 (A5 33)              |
    +----------------------------------------------------------------------+

MB special patch:
1. Changes: Workaround for hang A7(DF) issue, do warm reset if SanityCheckLep is failed.

;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 200H
BIOS Version	: L2.00H
BIOS Changes	:
(1) Modifications:

01.[Change]
Request By: Customer Nanya
Changed: Remove full reset after hPPR execution.
Verify by: N/A
Test Proposal: N/A

(2) Note
    1. BIOS image filename: P62D24L2.00H
    2. BMC firmware version: EP2C622D24LM_L1.32.00.ima

Engineer Name	: Charlie Lu
Release Date	: Fri 03-22-2019
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 200G
BIOS Version	: L2.00G
BIOS Changes	:
(1) Modifications:

01.[Change]
Request By: Customer Nanya
Changed: Increase FAN table to 5, respectively for CPU_FAN, FRNT_FAN1, FRNT_FAN2, FRNT_FAN4 to meet Nanya request.
Verify by: N/A
Test Proposal: N/A

(2) Note
    1. BIOS image filename: P62D24L2.00G
    2. BMC firmware version: EP2C622D24LM_L1.32.00.ima

Engineer Name	: Charlie Lu
Release Date	: Fri 03-22-2019
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 200F
BIOS Version	: L2.00F
BIOS Changes	:
(1) Modifications:

01. Sync code with AMI PurleyCrb_Refresh_041(RC v0571.D03).

02.[Change]
Request By: Customer Nanya
Changed: Support Error Pin Programing.
Verify by: N/A
Test Proposal: N/A

03.[Change]
Request By: Customer Nanya
Changed: Increase FAN table to 4, respectively for CPU_FAN, FRNT_FAN1, FRNT_FAN2, FRNT_FAN4 to meet Nanya request.
Verify by: N/A
Test Proposal: N/A

(2) Note
    1. BIOS image filename: P62D24L2.00F
    2. BMC firmware version: EP2C622D24LM_L1.20.00.ima

Engineer Name	: Charlie Lu
Release Date	: Thu 03-07-2019
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 200E
BIOS Version	: L2.00E
BIOS Changes	:
(1) Modifications:

01.[Change]
Request By: Customer Nanya
Changed: Merge SPD(2.00C) and Manual(2.00D).
Verify by: N/A
Test Proposal: N/A

02.[New]
Request By: Customer Nanya
Changed: Adjust VrefDQ after training.
Verify by: N/A
Test Proposal: N/A

(2) Note
    1. BIOS image filename: P62D24L2.00E
    2. BMC firmware version: EP2C622D24LM_L1.20.00.ima

Engineer Name	: Charlie Lu
Release Date	: Mon 12-10-2018
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 200D
BIOS Version	: L2.00D
BIOS Changes	:
(1) Modifications:

01. Based on L2.00C. Remove SPD read code temporarily. Expect to merge SPD and Manual methods in next version.

02.[Change]
Request By: Customer Nanya
Changed: Change "Dram Mask" to "Failed Device".
Verify by: N/A
Test Proposal: N/A

03.[Change]
Request By: BIOS RD Charlie
Changed: Modify PPR state default value from "Auto" to "Disabled".
Verify by: N/A
Test Proposal: N/A

04.[Change]
Request By: Customer Nanya
Changed: Set PPR state to disabled after executing PPR.
Verify by: N/A
Test Proposal: N/A

(2) Note
    1. BIOS image filename: P62D24L2.00D
    2. BMC firmware version: EP2C622D24LM_L1.20.00.ima

Engineer Name	: Charlie Lu
Release Date	: Wed 12-05-2018
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 200C
BIOS Version	: L2.00C
BIOS Changes	:
(1) Modifications:

01.[Change]
Request By: BIOS RD Charlie
Changed: Do a full reset after hPPR execution for the system crash issue.
Verify by: N/A
Test Proposal: N/A

02.[Change]
Request By: BIOS RD Charlie
Changed: Remove PPR debug message info.
Verify by: N/A
Test Proposal: N/A

03.[Change]
Request By: BIOS RD Charlie
Changed: Remove Soft PPR option, it's non-POR.
Verify by: N/A
Test Proposal: N/A

04.[Change]
Request By: Customer Nanya
Changed: Read SPD specified regioin to decide the failed address to execute hPPR.
Verify by: N/A
Test Proposal: N/A

05.[Change]
Request By: BIOS RD Charlie
Changed: Remove the original Intel hPPR detect function and remove the failed address manual setting on BIOS setup.
Verify by: N/A
Test Proposal: N/A

06.[Change]
Request By: BIOS RD Charlie
Changed: Set debug message level to maximum.
Verify by: N/A
Test Proposal: N/A

(2) Note
    1. BIOS image filename: P62D24L2.00C
    2. BMC firmware version: EP2C622D24LM_L1.20.00.ima

Engineer Name	: Charlie Lu
Release Date	: Mon 11-19-2018
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 200B
BIOS Version	: L2.00B
BIOS Changes	:
(1) Modifications:

01.[Change]
Request By: Customer Nanya
Changed: Add dram timing option.
Verify by: N/A
Test Proposal: N/A

02.[Change]
Request By: Customer Nanya
Changed: Add BIOS PPR item to set fail address.
Verify by: N/A
Test Proposal: N/A

03.[Change]
Request By: Customer Nanya
Changed: Add Dram VDD item to set voltage.
Verify by: N/A
Test Proposal: N/A

04. Sync code with EP2C621D16-4LP L2.00D.

(2) Note
    1. BIOS image filename: P62D24L2.00B
    2. BMC firmware version: EP2C622D24LM_L1.20.00.ima

Engineer Name	: Charlie Lu
Release Date	: Thu 10-25-2018
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 200A
BIOS Version	: L2.00A
BIOS Changes	:
(1) Modifications:

01. Sync code with AMI PurleyCrb_0ACLA027.1_BETA(RC v541.D11) based on L1.01.

02.[Change]
Request By: Customer Nanya
Changed: Open ECC support item.
Verify by: N/A
Test Proposal: N/A

(2) Note
    1. BIOS image filename: P62D24L2.00A
    2. BMC firmware version: EP2C622D24LM_L1.20.00.ima

Engineer Name	: Charlie Lu
Release Date	: Tue 08-21-2018
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 101
BIOS Version	: L1.01
BIOS Changes	:
(1) Modifications:

01.[Fixed]
Report By: EP2C622D24LM Bug[0111]
Symptom: MECI and METW can't test.
Root Cause: No test SOP.
Solution: These two items are not used, hiding them.
Verify by: BIOS QT
Test Proposal: Check BIOS page is without MECI and METW.

02.[Fixed]
Report By: EP2C621D24LM-AB Bug[0003]
Symptom: PLED will not light when waiting for BMC.
Root Cause: BIOS need to set proper GPIO to light the PLED.
Solution: Set GPP_D02 for PLED function.
Verify by: BMC QT
Test Proposal: Check power button PLED behavior is normal.

03.[Change]
Request By: BIOS RD Nick
Changed: [Running Change] Modify MMIO High Size default value to 64G.
Verify by: BIOS QT
Test Proposal: Check MMIO High Size default value is 64G.

04.[Change]
Request By: BIOS RD Nick
Changed: [Running Change] Display BMC IP on Light Screen, POST Screen, and Logo.
Verify by: BIOS QT
Test Proposal: Check BMC IP will be displayed on Light Screen, POST Screen, and Logo.

05.[New]
Request By: BIOS RD Nick
Changed: [Running Change] Add BMC Out of Band Access function.
Verify by: BIOS QT
Test Proposal: 1. Check BMC web can log in.
               2. Set Out of Band Access to disabled. F10.
               3. Check BMC web can not log in.
               4. Set Out of Band Access to enabled. F10.
               5. Boo to BIOS, wait about 100 seconds for BMC to initialize LAN configuration.
               6. Check BMC Network Configuration page can get BMC IP.
               7. Check BMC web can log in.

06.[Change]
Request By: BIOS RD Nick
Changed: Update UpdateFruInfo module to v011.
Verify by: BMC QT
Test Proposal: Check System Inventory function is OK.

07.[Change]
Request By: BIOS RD Nick
Changed: Modify SMBIOS type 4 CPU number start from 1 not 0.
Verify by: BIOS QT
Test Proposal: Check SMBIOS type 4 is CPU1 and CPU2, not CPU0 and CPU1.

08.[Change]
Request By: BIOS RD Nick
Changed: [Running Change] Remove HW monitor voltage sensor "+" string.
Verify by: BIOS QT
Test Proposal: Check HW monitor voltage sensor is without "+" string.

09.[Fixed]
Report By: EP2C622D24LM Bug[0127]
Symptom: Check PCH GPIO not match spec.
Root Cause: GPP_A21 and GPP_A23 is not used. BIOS setting is not match to PCH GPIO table.
Solution: Set GPP_A21 and GPP_A23 to OutputLow.
Verify by: BIOS QT
Test Proposal: Check sbgpio.exe result is match to GPIO table.

10.[Change]
Request By: BIOS RD Rany
Changed: Add "System inventory" item to Enable/Disable this function.
Verify by: BMC QT
Test Proposal: Disabled -> F10 -> plug a PCIe card or dimm -> check BMC web system inventory is without new info.
               Enabled -> F10 -> check BMC web system inventory is with new info.

11.[Fixed]
Report By: 3U8G+/C621 Bug[0020]
Symptom: Heat PCH, check BMC will generate unexpected event log.
Root Cause: This log will generate by SPS.
Solution: Modify the mask to close.
Verify by: BMC QT
Test Proposal: Heat PCH, check BMC will not generate unexpected event log below
		Temperature #0x08 | Upper Non-critical going high    | Asserted
		Temperature #0x08 | Upper Critical going high 	     | Asserted
		Temperature #0x08 | Upper Non-recoverable going high | Asserted

(2) Note
    1. BIOS image filename: P62D24L1.01
    2. BMC firmware version: EP2C622D24LM_L1.20.00.ima

Engineer Name	: Charlie Lu
Release Date	: Fri 06-08-2018
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 013
BIOS Version	: L0.13
BIOS Changes	:
(1) Modifications:

01.[Fixed]
Report By: EP2C622D24LM Bug[0112] & Bug[0113]
Symptom: CPU2_PCIE2 can not change link speed and ASPM.
Root Cause: BIOS setting is wrong.
Solution: Correct the BIOS setting.
Verify by: BIOS QT
Test Proposal: Check CPU2_PCIE2 link speed and ASPM function is normal.

(2) Note
    1. BIOS image filename: P62D24L0.13
    2. BMC firmware version: EP2C622D24LM_L0.09.00.ima

Engineer Name	: Charlie Lu
Release Date	: Tue 03-06-2018
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 012
BIOS Version	: L0.12
BIOS Changes	:
(1) Modifications:

01.[Change]
Request By: BIOS RD Nick
Changed: Update MCU to 50654_02000043.
Verify by: BIOS QT
Test Proposal: Check Microcode revision is 02000043.

(2) Note
    1. BIOS image filename: P62D24L0.12
    2. BMC firmware version: EP2C622D24LM_L0.09.00.ima

Engineer Name	: Charlie Lu
Release Date	: Mon 02-26-2018
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 011
BIOS Version	: L0.11
BIOS Changes	:
(1) Modifications:

01.[Change]
Request By: BIOS RD Nick
Changed: Degrade MCU version to 50654_02000030.
Verify by: BIOS QT
Test Proposal: Check Microcode revision is 02000030.

02.[New]
Report By: BIOS RD Nick
Changed: Add UpdateFruInfo module to support Inventory function.
Verify by: BMC QT
Test Proposal: Populate CPU, DIMM, PCIe card, NVMe, HDD, M.2 and check BMC web System Inventory Page (Need BMC support).

03.[Change]
Request By: BIOS RD Nick
Changed: Improve UpdateFruInfo module.
Verify by: BIOS QT
Test Proposal: Reboot the system and check the boot time is reasonable.

04.[Fixed]
Report By: EP2C622D16FM Bug[0186]
Symptom: PCIE M.2 information still diplay on BMC Web after remove M.2 devices.
Root Cause: No clear NVRAM Fru data after removing PCIE M.2.
Solution: Force to update NVRAM Fru data on PCIE M.2 FruID.
Verify by: BMC QT
Test Proposal: Check PCIE M.2 information will disappear after removing PCIE M.2 on BMC Web.

05.[Change]
Request By: BIOS RD Nick
Changed: Modify PROCHOT Modes default value from Input-only to Output-only.
Verify by: BIOS QT
Test Proposal: Check PROCHOT Modes default value is Output-only.

06.[Fixed]
Request By: BIOS RD Charlie
Symptom: Some SLIMLIN cable may cause bus correctable error on Bus 0x0, the bus number should be End Point Devices.
Root Cause: Intel RC code sometimes report the wrong bus number for PCI errors.
Solution: AMI fixed it. APTIOV_SERVER_OVERRIDE_RC_START : Fill Bus Number for End Point Devices and primary Bus Number for Bridges.
Verify by: BIOS QT
Test Proposal: Check the PCI correctable error bus number is right with the bad SLIMLIN cable.

(2) Note
    1. BIOS image filename: P62D24L0.11
    2. BMC firmware version: EP2C622D24LM_L0.09.00.ima

Engineer Name	: Charlie Lu
Release Date	: Tue 02-13-2018
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 010
BIOS Version	: L0.10
BIOS Changes	:
(1) Modifications:

01.[Change]
Request By: BIOS Leader Eddie
Changed: Update MCU to 50654_0200003C for Intel Spectre & Meltdown bug.
Verify by: BIOS QT
Test Proposal: Check Microcode revision is 0200003C.

02.[Fixed]
Request By: C3758D4I-4L Bug [0147]
Symptom: System will appear "EFI 01030003" log after unplug graphics card.
Solution: Do not log it after unplug graphics card.
Verify By: BIOS QT.
Test Proposal: 1. Plug a graphics card and boot to BIOS SETUP.
               2. Turn off the power supply and unplug the graphics card.
               3. Check Event Logs has no "EFI 01030003" log.
               4. Check BMC website has no "System Firmware Progress" log.

(2) Note
    1. BIOS image filename: P62D24L0.10
    2. BMC firmware version: EP2C622D24LM_L0.07.00.ima

Engineer Name	: Charlie Lu
Release Date	: Wed 01-24-2018
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 009
BIOS Version	: L0.09
BIOS Changes	:
(1) Modifications:

01.[Change]
Request By: BIOS Leader Eddie
Changed: Update MCU to 50654_0200003A for Intel Spectre & Meltdown bug.
Verify by: BIOS QT
Test Proposal: Check Microcode revision is 0200003A.

02.[Change]
Request By: BIOS RD Rany
Changed: Follow AMI rule when the device is VGA.
Verify by: BIOS QT
Test Proposal: Plug VGA card and check the slotoprom function is OK.

03.[Fixed]
Report By: EP2C622D24LM Bug[0031]
Symptom: BIOS Setup with PCB MEZZ string not match.
Root Cause: Setup string is different from PCB string.
Solution: Modfiy the string.
Verify by: BIOS QT
Test Proposal: Check BIOS Setup with MEZZ_MB_A1_B1, MEZZ_MB_C1 and MEZZ_MB_A2_B2 items.

04.[Change]
Request By: ME RD Smith
Changed: Set PCHHOT# to 86C for LBG-2.
Verify by: N/A
Test Proposal: N/A

05.[Change]
Request By: BIOS RD Charlie
Changed: Independent Mezz_C1 Slot OpROM item.
Verify by: BIOS QT
Test Proposal: Check Mezz_C1 Slot OpROM function is OK.

06.[Change]
Request By: BIOS RD Charlie
Changed: Correct Mezz_MB_A1_B1, Mezz_MB_C1 and Mezz_MB_A2_B2 pcie port number.
Verify by: BIOS QT
Test Proposal: Check Mezz_MB_A1_B1, Mezz_MB_C1 and Mezz_MB_A2_B2 link speed & ASPM function is OK.

(2) Note
    1. BIOS image filename: P62D24L0.09
    2. BMC firmware version: EP2C622D24LM_L0.07.00.ima

Engineer Name	: Charlie Lu
Release Date	: Fri 01-12-2018
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 008
BIOS Version	: L0.08
BIOS Changes	:
(1) Modifications:

01.[Fixed]
Report By: EP2C622D16FM Bug[0173]
Symptom: Set CSM to Disabled and plug in VGA card, system may hang on 0xCB.
Root Cause: IoWrite8(0xCF9, 0x4) cause it.
Solution: Using ResetSystem function to replace it.
Verify by: BIOS QT
Test Proposal: CSM Disabled -> AC off -> Plug in UEFI VGA card -> AC on -> Check it can boot to BIOS.

02.[Fixed]
Report By: EP2C622D16FM Bug[0163]
Symptom: CPLD version is wrong on BIOS main page.
Root Cause: FW Info command is changed for EPC621D8A Bug[0207].
Solution: Update FW Info command.
Verify by: BIOS QT
Test Proposal: Check CPLD version is correct on BIOS main page (BMC version need to be L0.07.00 or later).

03.[Change]
Request By: HW RD Tony
Changes: Reduce HS Preemphasis Bias of USB3_1, USB3_2 and USB3_5.
Verify: BIOS QT
Test Proposal: Using RW.exe to check Memory Address FDCA4100, FDCA4200 and FDCA4500. Check bit 11 is 1, bit 12 is 0 and bit 13 is 0.

04.[Change]
Request By: HW RD Tony
Changes: Modify CPU2_PCIE2 "PCI-E Port DeEmphasis" default value from -3.5db to -6.0dB. Hdie -3.5dB option.
Verify: BIOS QT
Test Proposal: Ctrl+Alt+F3, Socket Config\IIO Configuration\Socket1 Configuration\Socket 1 PcieBr2D02F0 - Port 2C\PCI-E Port DeEmphasis
               Check this item default value is [-6.0dB], and without -3.5dB option.

(2) Note
    1. BIOS image filename: P62D24L0.08
    2. BMC firmware version: EP2C622D24LM_L0.07.00.ima

Engineer Name	: Charlie Lu
Release Date	: Tue 01-02-2017
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 007
BIOS Version	: L0.07
BIOS Changes	:
(1) Modifications:

01.[Fixed]
Report By: EPC621D8A Bug[0207]
Symptom: Check ME version BMC web and BIOS setup mismatch
Root Cause: FW Info command cannot accept ME version format.
Solution: Update FW Info command.
Verify by: BMC QT
Test Proposal: Check BMC web can get correct FW info (Need BMC support).

02.[Change]
Request By: BIOS RD Nick
Changes: Modify C1E option "Auto" to "Enabled".
Verify: BIOS QT
Test Proposal: Check C1E option is "Enabled" and "Disabled".

03.[Fixed]
Report By: EP2C622D24LM Bug[0034]
Symptom: Can not check CPLD version.
Root Cause: BIOS and BMC function is not ready.
Solution: Display CPLD version on BIOS main page.
Verify by: BIOS QT
Test Proposal: Check CPLD version will be on BIOS main page (BMC version need to be L0.06.00 or later).

04.[Change]
Request By: BIOS RD Nick
Changes: Remove AMI Intel Pre Boot DMA Protections WA.
Verify: N/A
Test Proposal: N/A

05.[Change]
Request By: BIOS RD Charlie
Changes: Modify SlotOpRom module to support dynamic MmCfgBase.
Verify: BIOS QT
Test Proposal: Change MmCfgBase and check SlopOpRom function is normal.

06.[Fixed]
Report By: BIOS RD Nick
Symptom: Can not install Support CD when CSM is Disabled.
Root Cause: AMI do not permit to access address F000. Support CD can not find ASRock module.
Solution: Enable F000 to be accessed.
Verify by: BIOS QT
Test Proposal: Check Support CD can be installed when CSM is Disabled.

07.[Fixed]
Report By: BIOS RD Charlie
Symptom: Add-on VGA can not work when CSM is Disabled.
Root Cause: SlotOpRom will override AMI's rule.
Solution: Follow AMI's rule when device is Display controller or Video device.
Verify by: BIOS QT
Test Proposal: Plug an Add-on VGA and check it will work when CSM is Disabled.

08.[Change]
Request By: BIOS RD Charlie
Changes: Modify MmPci to MmioRead for PmeWakeup.
Verify: QTC
Test Proposal: Check Wake on LAN from S4 & S5 is OK.

09.[Change]
Request By: BIOS RD Rany
Changes: Can not access TPM setting when enter to BIOS with user password.
Verify: BIOS QT
Test Proposal: Plug TPM and enter to BIOS with user password. Check BIOS can not access TPM settings.

(2) Note
    1. BIOS image filename: P62D24L0.07
    2. BMC firmware version: EP2C622D24LM_L0.06.00.ima

Engineer Name	: Charlie Lu
Release Date	: Mon 12-18-2017
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 006
BIOS Version	: L0.06
BIOS Changes	:
(1) Modifications:

01.[Change]
Request By: BIOS RD Nick
Changes: AMI update Intel Pre Boot DMA Protections solution.
Verify: N/A
Test Proposal: N/A

02.[Change]
Request By: BIOS RD Nick
Changes: Move items which in the page "SATA Storage Configuration" and "sSATA Storage Configuration" to the previous page.
Verify: BIOS QT
Test Proposal: Check these items are in the page "Storage Configuration".

03.[Fixed]
Report By: BIOS RD Nick
Symptom: PCIE M.2 item will hide when SATA/sSATA Controller is disabled.
Root Cause: BIOS setting.
Solution: Independent PCIE M.2 item with SATA/sSATA Controller.
Verify by: BIOS QT
Test Proposal: Set SATA/sSATA Controller to disabled and check PCIE M.2 will not hide.

04.[Change]
Request By: BIOS RD Charlie
Changes: Modify USB exposed port setting to follow MB design for WHQL test.
Verify: QTC
Test Proposal: Check USB exposed port number is matched to MB design.

05.[Change]
Request By: HW RD Tony
Changes: Set GPP_A22 to OutputLow and GPP_B19 to Input.
Verify: BIOS QT
Test Proposal: Execute SBGPIO.exe and check GPP_A22 is OutputLow and GPP_B19 is InputHigh.

06.[Change]
Request By: BIOS RD Nick
Changes: "Security Device Support" option from "enable" and "disable" to "enabled" and "disabled".
Verify: BIOS QT
Test Proposal: Check "Security Device Support" option.

07.[Change]
Request By: BIOS RD Nick
Changes: Add text "Processor Type", "Microcode Revision", "Intel VT-x Technology".
Verify: BIOS QT
Test Proposal: Check this string on CPU Configuration page.

08.[Change]
Request By: BIOS RD Nick
Changes: Add text "Channel Mode".
Verify: BIOS QT
Test Proposal: Check Total Memory will display "Channel Mode".

(2) Note
    1. BIOS image filename: P62D24L0.06
    2. BMC firmware version: EP2C622D24LM_L0.04.00.ima

Engineer Name	: Charlie Lu
Release Date	: Thu 12-07-2017
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 005
BIOS Version	: L0.05
BIOS Changes	:
(1) Modifications:

01.[Change]
Request By: BIOS RD Nick
Changes: Replace ASRR PK key.
Verify: N/A
Test Proposal: N/A

02.[Change]
Request By: BIOS RD Nick
Changes: Modify Wait For BMC help string.
Verify: BIOS QT
Test Proposal: Wait For BMC response for specified time out. BMC starts at the same time when BIOS starts during AC power ON. It takes around 90 seconds to initialize Host to BMC interfaces.

03.[Fixed]
Report By: EP2C622D24LM Bug[0055]
Symptom: Ring-in power on can not wake up in S4.
Root Cause: BIOS GPIO pin setting is different from MB design.
Solution: Change GPIO pin setting from GPP_C23 to GPP_C11.
Verify by: Server QT
Test Proposal: Check Ring-in power on function is normal.

04.[Change]
Request By: HW RD Tony
Changes: Auto switch CPU1_PCIE1, CPU2_PCIE1 and CPU2_PCIE2 link width with Riser card.
Verify: BIOS QT
Test Proposal: Set CPU1_PCIE1, CPU2_PCIE1 and CPU2_PCIE2 link width to "Auto".
               Use Riser card RB237-x16x8 and RB237-x8x4 to check PCIE device link width is correct.

05.[Change]
Request By: BIOS RD Nick
Changes: Set HDD_SECURITY_SUPPORT to 0 follow AMI default.
Verify: N/A
Test Proposal: N/A

06.[Fixed]
Report By: EP2C622D24LM Bug[0050]
Symptom: USB2_1 can not be safe removed.
Root Cause: RC code default do not enable USB port 7.
Solution: Modify ASL code to follow MB design.
Verify by: Server QT
Test Proposal: Check USB safe remove icon function.

07.[Change]
Request By: BIOS RD Charlie
Changes: Add VMD setting for CPU1_PCIE1, CPU2_PCIE1 and CPU2_PCIE2.
Verify: BIOS QT
Test Proposal: Check CPU1_PCIE1, CPU2_PCIE1 and CPU2_PCIE2 can be created RAID with VROC key.

08.[Change]
Request By: BIOS RD Charlie
Changes: Disable QAT and Enable DualOutputRead to follow ASRR rule.
Verify: N/A
Test Proposal: N/A

09.[Fixed]
Report By: EP2C622D16FM Bug[0158]
Symptom: It will generate unknown sensor event log when heat CPU.
Root Cause: SPS will send CPU Thermal Status log to BMC.
Solution: Disable this function.
Verify by: BMC QT
Test Proposal: Check it will not generate unknown sensor event log (#1ch and #1dh) when heat CPU.

10.[Change]
Request By: HW RD Tony
Changes: Set GPP_G3-6 to Input.
Verify: BIOS QT
Test Proposal: Execute SBGPIO.exe to check GPP_G3-6 is matched to HW GPIO table.

11.[Change]
Request By: BIOS RD Nick
Changes: Workaround for hang A7(DF) issue, do warm reset if SanityCheckLep is failed.
Verify: N/A
Test Proposal: N/A

12.[Change]
Request By: BIOS RD Nick
Changes: Modify SEL Component default value to Enable.
Verify: BIOS QT
Test Proposal: Check this symptom.

13.[Fixed]
Report By: EP2C622D24LM Bug[0026]
Symptom: Debug port will show 0xE3 when S4 resume, it should be 0x40.
Root Cause: 0xE3 will override 0x40 in RC code.
Solution: If wake up from S3 or S4, do not override 80 port.
Verify by: BIOS QT
Test Proposal: Check debug port will show 0x40 when S4 resume.

14.[Change]
Request By: BIOS RD Nick
Changes: Set Enforce POR default value to "Enforce POR".
Verify: BIOS QT
Test Proposal: Check its default value.

15.[Change]
Request By: BIOS RD Nick
Changes: Add DCU Streamer Prefetcher item.
Verify: BIOS QT
Test Proposal: Check this item on CPU Configuration page.

(2) Note
    1. BIOS image filename: P62D24L0.05
    2. BMC firmware version: EP2C622D24LM_L0.04.00.ima

Engineer Name	: Charlie Lu
Release Date	: Tue 12-05-2017
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 004
BIOS Version	: L0.04
BIOS Changes	:
(1) Modifications:

01.[Fixed]
Report By: EP2C622D24LM Bug[0023].
Symptom: SHA256 PCR Bank can not load default.
Root Cause: Follow AMI setting.
Solution: Modify test rule.
Verify by: BIOS QT
Test Proposal: 1. Set SHA-1 PCR Bank to "Enable" and SHA256 PCR Bank to "Enable", pressing F9, SHA-1 is "Enable" and SHA256 is "Enable".
               2. Set SHA-1 PCR Bank to "Disable" and SHA256 PCR Bank to "Enable", pressing F9, SHA-1 is "Disable" and SHA256 is "Enable".
               3. Set SHA-1 PCR Bank to "Enable" and SHA256 PCR Bank to "Disable", pressing F9, SHA-1 is "Enable" and SHA256 is "Disable".
               4. Set SHA-1 PCR Bank to "Disable" and SHA256 PCR Bank to "Disable", pressing F9, SHA-1 is "Enable" and SHA256 is "Disable".

02.[Fixed]
Report By: EP2C622D24LM Bug[0060] & EP2C622D24LM Bug[0061].
Symptom: CPU2_PCIE2 link width is [x8x4x4], it must be [x8] or [x4x4].
Root Cause: CPU2_PCIE2 link width is x8, BIOS item did not modify to x8 mode.
Solution: Modify CPU2_PCIE2 link width item to [x8] and [x4x4].
Verify by: QTC
Test Proposal: Check BIOS CPU2_PCIE2 link width item is [x8] and [x4x4], and its function is normal.

03.[Change]
Request By: BIOS RD Charlie
Changes: Modify PCIE link speed, link width, and ASPM item to follow MB design.
Verify: N/A
Test Proposal: N/A

04.[Change]
Request By: BIOS RD Nick
Changes: Set SLIMLIN Max Payload from 128B to Auto.
Verify: N/A
Test Proposal: N/A

05.[Fixed]
Report By: EP2C622D24LM Bug[0015].
Symptom: PCH GPIO not match spec.
Root Cause: BIOS setting not match to HW GPIO table.
Solution: Modify BIOS GPIO setting.
Verify by: BIOS QT
Test Proposal: Execute SBGPIO.exe and check PCH GPIO is matched to HW GPIO table or not.

06.[Fixed]
Report By: EP2C622D24LM Bug[0019].
Symptom: Use 6126 CPU, Active Processor Cores test fail.
Root Cause: 6126 FUSED_CORE_MASK is different from other CPU.
Solution: Modify BIOS code to support different FUSED_CORE_MASK.
Verify by: BIOS QT
Test Proposal: Check Active Processor Cores function is normal.

(2) Note
    1. BIOS image filename: P62D24L0.04
    2. BMC firmware version: EP2C622D24LM_L0.03.00.ima

Engineer Name	: Charlie Lu
Release Date	: Tue 11-28-2017
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 003
BIOS Version	: L0.03
BIOS Changes	:
(1) Modifications:

01.[Change]
Request By: HW RD
Changes: Unsupport Skylake-FPGA for now.
Verify: N/A
Test Proposal: N/A

02.[Change]
Request By: BIOS RD Charlie
Changes: Remove no used fan controller REAR_FAN1 & REAR_FAN2.
Verify: BIOS QT
Test Proposal: Check fan controller without REAR_FAN1 & REAR_FAN2.

(2) Note
    1. BIOS image filename: P62D24L0.03
    2. BMC firmware version: EP2C622D24LM_L0.03.00.ima

Engineer Name	: Charlie Lu
Release Date	: Thu 11-23-2017
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 002
BIOS Version	: L0.02
BIOS Changes	:
(1) Modifications:

01.[Change]
Request By: BIOS RD Nick
Changes: Support Skylake-FPGA.
Verify: N/A
Test Proposal: N/A

02.[Change]
Request By: BIOS RD Nick
Changes: Automatically install secure boot keys.
Verify: BIOS QT
Test Proposal: Set Secure boot to "Enable", and check secure boot keys are installed automatically.

03.[Fixed]
Report By: EP2C622D24LM Bug[0023].
Symptom: SHA256 PCR Bank cannot load default by pressing F9.
Root Cause: AMI override its default value.
Solution: Override default value to expected default.
Verify by: BIOS QT
Test Proposal: Check SHA256 PCR Bank can load default normally.

04.[Change]
Request By: BIOS RD Nick
Changes: Clear SMBIOS event log when load default by UEFIDEF.exe tool.
Verify: BIOS QT
Test Proposal: Execute UEFIDEF.exe tool and check SMBIOS event log will be cleared.

05.[Change]
Request By: BIOS RD Charlie
Changes: Remove "Launch Other Network OpROM Policy" item cause MB do not support Fabric CPU.
Verify: BIOS QT
Test Proposal: Check this item is removed on CSM page.

06.[Change]
Request By: BIOS Leader Eddie
Changes: Remove Spread Spectrum "Auto" item.
Verify: BIOS QT
Test Proposal: Check Spread Spectrum only has Disabled and Enabled item.

07.[Change]
Request By: BIOS RD Nick
Changes: Set HDD_SECURITY_SUPPORT to 1.
Verify: N/A
Test Proposal: N/A

08.[Fixed]
Report By: EP2C622D24LM Bug[0022].
Symptom: BIOS Setup without Fan control item.
Root Cause: BIOS chassisid BMC GPIO porting is wrong.
Solution: Currect CHASSIS_ID_1_GPIO_NUM to GPIO C4, CHASSIS_ID_2_GPIO_NUM to C5, CHASSIS_ID_3_GPIO_NUM to C6.
Verify by: BIOS QT
Test Proposal: Check BIOS Setup with Fan control item.

09.[New]
Report By: BIOS RD Nick
Changed: Add KTI info function.
Verify by: N/A
Test Proposal: N/A

10.[Fixed]
Report By: EP2C622D24LM Bug[0020].
Symptom: System can not trigger NMI with NMI button.
Root Cause: PCH porting is error.
Solution: Currect NMI function pin from GPP_C22 to GPP_D0.
Verify by: BIOS QT
Test Proposal: Check NMI can be triggered with NMI button.

(2) Note
    1. BIOS image filename: P62D24L0.02
    2. BMC firmware version: EP2C622D24LM_L0.03.00.ima

Engineer Name	: Charlie Lu
Release Date	: Thu 11-23-2017
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 001
BIOS Version	: L0.01
BIOS Changes	:
(1) Modifications:

01.[Change]
Request By: BIOS RD Nick
Changes: Modify PCIe base address to follow MmCfgBase.
Verify: BIOS QT
Test Proposal: Check PrimaryVGA, clear CMOS, Light Screen, SSID, Wake on LAN, Plug N590 card are normal when MmCfgBase is changed.

02.[Change]
Request By: BIOS RD Nick
Changes: Update CPU Microcode to M9750654_02000030.mcb and SPS version to 4.0.4.288.
Verify: BIOS QT
Test Proposal: Chekc Microcode Revision is 02000030 and SPS version is 4.0.4.288.

03.[Fixed]
Report By: EP2C622D16NM Bug[0062].
Symptom: Plug AMD 7730 Vga card at PCIE6 slot,then power on,system will hang 4dh.
Root Cause: BIOS do not handle out of resource when above 4G is enabled.
Solution: Follow RC code, make MmCfgBase can be changed dynamically.
Verify by: N/A
Test Proposal: N/A

04.[Change]
Request By: BIOS RD Nick
Changes: Update PW version ACM binary file.
Verify: BIOS QT
Test Proposal: Check TPM and TXT feature.

05.[Change]
Request By: BIOS RD Rany
Changes: Update VMDVROC_1.efi and VMDVROC_2.efi.
Verify: N/A
Test Proposal: N/A

06.[Fixed]
Request By: EP2C622D16FM BUG[0090]
Symptom: Press "ctrl+I" more than 10 times until boot to SATA/sSATA Option ROM. USB KB will not normal
Root Cause: This is happening because of LED sequence setting interruption while processing the Break code of Right Ctrl key(0xE0, 0x1d).
            E0 Key flag setting is missed in Int 9 handler.
Solution: Modify AmiLegacy16.bin
Verify by: BIOS QT
Test Proposal: Check this symptom.

07.[Change]
Request By: BIOS RD Nick
Changes: Modify Hard Disk S.M.A.R.T default value to Disabled.
Verify: BIOS QT
Test Proposal: Check this symptom.

08.[Fixed]
Report By: BIOS RD Charlie
Symptom: System will always reset when COM1 & SOL enable and load LAN driver.
Root Cause: BIOS will reset system when there are three SimpleTextOutput device.
Solution: Remove reset function and display post screen hotkey string when SimpleTextOutput device number is 1, 2, or 3.
Verify by: BIOS QT
Test Proposal: Plug LAN card (Make sure it will load LAN driver) and enable COM1 & SOL. Check it will display post screen hotkey string and system will not reset.

09.[Fixed]
Report By: EPC621D8A Bug[0195].
Symptom: Setup item "CSM' set 'Enabled' & 'Launch PXE OpROM Policy' set 'Legacy only'
Solution: Set LAN resource below 4G.
Verify by: BIOS QT
Test Proposal: Check LAN card and Type-C PHY card can execute legacy PXE oprom and link.

10.[Change]
Request By: BIOS RD Nick
Changes: Change CSM style.
	 Disable -> Disable Legacy.
	 Enable  -> AMI style.
	 Custom  -> ASRR style (SlotOpRom).
Verify: N/A
Test Proposal: N/A

11.[Change]
Request By: BIOS RD Nick
Changes: Modify code for Intel Pre Boot DMA Protections.
Verify: N/A
Test Proposal: N/A

12.[Change]
Request By: BIOS RD Nick
Changes: Remove items "TPM2.0 UEFI Spec Version" and "Physical Presence Spec Version".
Verify: BIOS QT
Test Proposal: Plug TPM2.0 and check no these two items.

13.[Change]
Request By: BIOS RD Nick
Changes: Execute Send FW info to BMC function after gEfiDxeIpmiTransportProtocolGuid is installed.
Verify: BMC QT
Test Proposal: Check BIOS, Micro code, and ME version on BMC web is matched to BIOS.

14.[Fixed]
Request By: EP2C622D16HM BUG[0081]
Symptom: Item "ECC Support" set "disable" will hang "EE"
Root Cause: AMI RC code doesn't support this item.
Solution: Remove item "ECC Support".
Verify by: BIOS QT
Test Proposal: Check BIOS page.

15.[Fixed]
Report By: EP2C622D16NM Bug[0096]
Symptom: User password can access Intel VMD technology page and Intel VMD for Volume Management Device page.
Root Cause: BIOS did not gray out these two pages when using user password.
Solution: Gray out these two pages when using user password.
Verify by: BIOS QT
Test Proposal: Enter BIOS by user password and check these items can not be accessed.

16.[Fixed]
Report By: EP2C622D16FM Bug[0143]
Symptom: User Password can not access boot option.
Root Cause: BIOS setting.
Solution: Modify BIOS setting that boot option can be accessed by user password.
Verify by: BIOS QT
Test Proposal: Check User Password can access boot option.

17.[Change]
Request By: BIOS RD Nick
Changes: Modify "SATA/sSATA ALPM" item string to "SATA ALPM" and "sSATA APLM" for SATA and sSATA respectively.
Verify: BIOS QT
Test Proposal: Check item string is "SATA ALPM" and "sSATA APLM" for SATA and sSATA respectively.

18.[Change]
Request By: BIOS RD Nick
Changes: Modify "OnBoard LAN" item string to "MEZZ_C1".
Verify: BIOS QT
Test Proposal: Check this symptom.

19.[Change]
Request By: BIOS RD Rany
Changes: Update Enforce POR help string.
Verify: N/A
Test Proposal: N/A

20.[Change]
Request By: BIOS RD Nick
Changes: Remove SecSIO & WDTSwSMI module.
Verify: N/A
Test Proposal: N/A

21.[New]
Report By: BIOS RD Nick
Changed: Add "PCH" information on Main page.
Verify by: N/A
Test Proposal: N/A

22.[Change]
Request By: BIOS RD Rany
Changes: Update "Short Duration Power Limit" and "Long Duration Power Limit" patch, that input value match icpu.efi test result.
Verify: BIOS QT
Test Proposal: Modify these two item, and use iCPU.exe to check.

23.[Change]
Request By: BIOS RD Rany
Changes: Remove items "Port 60/64 Emulation" and "Legacy USB 3.0 Support".
Verify: BIOS QT
Test Proposal: Check these two items are removed from USB Configuration page.

24.[Fixed]
Report By: EP2C622D16FM Bug[0049].
Symptom: "Restore AC Power Loss Current Stat" string should be "Restore AC Power Loss Current State"
Root Cause: The string is too long to display on BIOS page.
Solution: Modify the string to "Restore AC Power Current State"
Verify by: BIOS QT
Test Proposal: Check this string.

25.[Change]
Request By: BIOS RD Nick
Changes: Wait 10 seconds when clear CMOS or ME recovery in POST screen.
Verify: BIOS QT
Test Proposal: System will wait 10 seconds then continue when clear CMOS or ME recovery.
               User can press F1(continue) or F2(enter BIOS) to skip waiting 10 seconds.

26.[Change]
Request By: BIOS RD Nick
Changes: Modify HDDINFO porting.
Verify: BIOS QT
Test Proposal: Check SATA/sSATA port can be detected, SATA M.2 can be detected.

27.[Fixed]
Report By: EC621D8A Bug[0198].
Symptom: Check Advanced/Storage Configuration/All SATA/M.2 device info not aligned.
Solution: Uppdate setup string.
Verify by: BIOS QT
Test Proposal: Check string is aligned.

28.[Change]
Request By: BIOS RD Nick
Changes: Control MEZZ Type C by MEZZ_1 slot oprom.
Verify: BIOS QT
Test Proposal: Check MEZZ Type C can load Legacy and UEFI driver and disable.

29.[Fixed]
Report By: BIOS RD Nick
Symptom: Change SDR PCH Temp Sensor Assertion and Deassertion Event Mask to 0x0fc0 and 0x7fc0, AfuEfi will fail when it flash ME Region.
Root Cause: AMI ME Region start address default value is set to 0x3000, it should be 0x1000 when the GBE Region is removed.
Solution: Override ME Region start address from 0x3000 to 0x1000.
Verify by: BIOS QT
Test Proposal: Use two BIOS ROM A and B. The Assertion and Deassertion Event Mask of A and B is 0x7fff/0x7fff and 0x0fc0/0x07fc0 respectively.
               1. Load BIOS A and execute AfuEfix64.efi B /me -> Check it success or not.
               2. AC Off then AC On.
               3. Execute AfuEfix64.efi A /me -> Check it success or not.

30.[Change]
Request By: BIOS RD Tina
Changes: Do global reset when change IMC interleaving setting, and modify BCK file for testing.
Verify: BIOS QT
Test Proposal: Change IMC interleaving item and execute BCK file to check.

31.[Fixed]
Request By: BIOS RD Tina
Symptom: BMC will recieve no used SEL.
Root Cause: Intel NM will send Inlet Ariflow Temperature Sensor SEL to BMC.
Solution: Modify Event Mask and Threshold Mask to disable this sensor.
Verify by: BMC QT
Test Proposal: Check BMC web does not have below event logs.
               Lower Non-critical going low, Lower Critical going low, Lower Non-recoverable going low
               Upper Non-critical going high, Upper Critical going high, Upper Non-recoverable going high

32.[Change]
Request By: BIOS RD Charlie
Changes: Disable ME Heartbeat function for GPP_H5 to follow MB design.
Verify: BIOS QT
Test Proposal: Execute sbgpio.exe to check BIOS setting match HW GPIO table or not.

33.[Change]
Request By: BIOS RD Nick
Changes: Set SMB Alert MGPIO, PROCHOT MGPIO, SMB Alert_EN MGPIO, and PSU Optimization to None(Disable), cause MB do not use these functions.
Verify: N/A
Test Proposal: N/A

34.[Fixed]
Report By: EP2C622D16FM Bug[0118]
Symptom: Ring-in power on can not wake up.
Root Cause: BIOS GPIO pin setting is different from MB design.
Solution: Change GPIO pin setting from GPP_C23 to GPP_C11.
Verify by: Server QT
Test Proposal: Check Ring-in power on function is normal.

35.[Change]
Request By: BIOS RD Nick
Changes: Check GPIO_G12, waiting for BMC when GPIO_G12 is high.
Verify: BIOS QT
Test Proposal: Wait For BMC Enable, BIOS will take a while to wait BMC to initialize (at most 90s).

36.[Fixed]
Report By: BIOS RD Rany
Symptom: SMBIOS type 4 max speed is not correct.
Root Cause: BIOS porting is not correct.
Solution: Correct BIOS porting.
Verify by: BIOS QT
Test Proposal: Execute smbiosck.exe and check SMBIOS type 4 max speed is matched to CPU.

(2) Note
    1. BIOS image filename: P62D24L0.01
    2. BMC firmware version: EP2C622D24LM_L0.01.00.ima

Engineer Name	: Charlie Lu
Release Date	: Thu 11-16-2017
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM
Project Build	: 000
BIOS Version	: L0.00
BIOS Changes	:
(1) Modifications:

01. Sync code with EP2C622D16HM L0.09(RC v142.R08).

02.[Fixed]
Report By: EP2C622D16FM Bug[0055].
Symptom: CPU processor number is not matched on Device Manager.
Root Cause: Active Processor Cores computing way is reversed.
Solution: Correct the computing way.
Verify by: BIOS QT
Test Proposal: Set Active Processor Cores and check the processor number is matched on Device Manager.

(2) Note
    1. BIOS image filename: P62D24L0.00

Engineer Name	: Tina Tseng
Release Date	: Wed 08-30-2017
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM-2TP
Project Build	: 007
BIOS Version	: L0.07
BIOS Changes	:
(1) Modifications:

01. Sync code with AMI Purley_CRB_066B(RC v121.R04).
02. Disabled GPP_C22, GPP_D1 SCI.

(2) Note
    1. BIOS image filename: P622LMT0.07
    2. BMC firmware version: EP2C624D24LM-2TP_L0.01.00.ima

Engineer Name	: Nick Tsai
Release Date	: Sat 02-18-2017
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM-2TP
Project Build	: 006
BIOS Version	: L0.06
BIOS Changes	:
(1) Modifications:

01. Sync code with AMI Purley_CRB_065B(RC v119.R05).

(2) Note
    1. BIOS image filename: P622LMT0.06
    2. BMC firmware version: EP2C624D24LM-2TP_L0.01.00.ima

Engineer Name	: Nick Tsai
Release Date	: Fri 02-03-2017
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM-2TP
Project Build	: 005
BIOS Version	: L0.05
BIOS Changes	:
(1) Modifications:

01. Sync code with AMI Purley_CRB_064B(RC v118.R01).

(2) Note
    1. BIOS image filename: P622LMT0.05
    2. BMC firmware version: EP2C624D24LM-2TP_L0.01.00.ima

Engineer Name	: Nick Tsai
Release Date	: Thu 01-26-2017
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM-2TP
Project Build	: 004
BIOS Version	: L0.04
BIOS Changes	:
(1) Modifications:

01.[Change]
Request By: BIOS RD Nick
Changes: Sync code with AMI Purley_CRB_062B(RC v116.R01).
Verify: N/A
Test Proposal: N/A

(2) Note
    1. BIOS image filename: P622LMT0.04
    2. BMC firmware version: EP2C622D12NM-4L_L0.07.00.ima

Engineer Name	: Nick Tsai
Release Date	: Thu 01-12-2017
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM-2TP
Project Build	: 003
BIOS Version	: L0.03
BIOS Changes	:
(1) Modifications:

01. Proting PCIE link width for OCU4.

02.[Fixed]
Request By: BIOS
Symtpom: System will auto power after system into S5.
Solution: Modify GPIO GPP_C11 and GPP_C23 for EP2C622D24LM-2TP.
Verify By: Server QT
Test Proposal: Check this symptom.

(2) Note
    1. BIOS image filename: P622LMT0.03
    2. BMC firmware version: EP2C622D12NM-4L_L0.07.00.ima

Engineer Name	: Nick Tsai
Release Date	: Mon 01-09-2017
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM-2TP
Project Build	: 002
BIOS Version	: L0.02
BIOS Changes	:
(1) Modifications:

01.[Change]
Request By: BIOS RD Nick
Changes: Sync code with AMI Purley_CRB_061(RC v114.R09).
Verify: N/A
Test Proposal: N/A

02.[Change]
Request By: BIOS RD Nick
Changes: Set CLKOUT_NSSCCAP0 setting to "100Mhz" for AST2500 VGA.
Verify: N/A
Test Proposal: N/A

(2) Note
    1. BIOS image filename: P622LMT0.02
    2. BMC firmware version: EP2C622D12NM-4L_L0.07.00.ima

Engineer Name	: Nick Tsai
Release Date	: Wed 01-04-2017
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM-2TP
Project Build	: 001
BIOS Version	: L0.01
BIOS Changes	:
(1) Modifications:

01.[Change]
Request By: BIOS RD Nick
Changes: Sync code with AMI Purley_CRB_061B(RC v114.R09).
Verify: N/A
Test Proposal: N/A

(2) Note
    1. BIOS image filename: P622LMT0.01
    2. BMC firmware version: EP2C622D12NM-4L_L0.07.00.ima

Engineer Name	: Nick Tsai
Release Date	: Sat 12-31-2016
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM-2TP
Project Build	: 000
BIOS Version	: L0.00B
BIOS Changes	:
(1) Modifications:

01.[Change]
Request By: BIOS RD Nick
Changes: Sync code with EP2C622D12NM-4L L0.40.
Verify: N/A
Test Proposal: N/A

(2) Note
    1. BIOS image filename: P622LMT0.00B
    2. BMC firmware version: EP2C622D12NM-4L_L0.07.00.ima

Engineer Name	: Nick Tsai
Release Date	: Fri 12-09-2016
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM-2TP
Project Build	: 000
BIOS Version	: L0.00A
BIOS Changes	:
(1) Modifications:

01. Disabled FPGA_SUPPORT first.

(2) Note
    1. BIOS image filename: P622LMT0.00A
    2. BMC firmware version: EP2C622D12NM-4L_L0.07.00.ima

Engineer Name	: Nick Tsai
Release Date	: Wed 12-07-2016
;-----------------------------------------------------------------------;
Project Name	: EP2C622D24LM-2TP
Project Build	: 000
BIOS Version	: L0.00
BIOS Changes	:
(1) Modifications:

01. First Release, based on EP2C622D12NM-4L L0.38

(2) Note
    1. BIOS image filename: P622LMT0.00
    2. BMC firmware version: EP2C622D12NM-4L_L0.07.00.ima

Engineer Name	: Nick Tsai
Release Date	: Thu 12-01-2016
;-----------------------------------------------------------------------;